RISC的例句

1. Most RISC processors are big-endian.: 大多数RISC处理器都是big - endian。

2. The structure of RISC is very simple.: RISC具有结构简单、指令简单的特点。

3. RISC design is register file operation oriented.: RISC设计是面向寄存器堆操作的。

4. For RISC processer, clock-gating can reduce power by 18.8%.: 对于risc微处理器，门控时钟技术可以降低功耗18.8%。

5. RISC: RISC is the acronym for "reduced instruction set computing".: 精简处理：英文是“减少指令组的电脑处理”的字首字。

6. ARM embedded processor is a high performance, low - power RISC chips.: ARM嵌入式处理器是一种高性能、低功耗的RISC芯片。

7. Support for the newly released HP-UX Version 11.23 release on PA-RISC.: 对新发布的HP - UXVersion 11.23releaseon PA - RISC的支持。

8. It consisted of over 100 instructions and was known as a complex RISC system.: 它包含超过100种指令，被称为复杂的RISC系统。

9. The model is based on 32 bits RISC, and other modules can be configured.: 该模型基于32位RISC构建，并可配置其它硬件模块。

10. First, the usual RISC is synchronous, supplied a clock single by a clock element.: 首先，平常的RISC计算机是同步的，由一个时钟提供一个同步的信号。

11. The emphasis in CPU design shifted to raw performance, and RISC became the new philosophy.: CPU设计的重点转到了提高性能上，RISC成了新的(设计)思想。

12. Its six RISC processors can morph into different programming modes for reconfigurable data flow.: 它的6个RISC处理器能提供不同的编程模式，重新配置数据流。

13. The development of instruction level power model is discussed to our self-made LS-RISC microprocessor.: 针对笔者自主研制的LS -RISC微处理器，讨论了其指令级功耗模型的开发。

14. The MIPS architecture embodies the fundamental design principles of all contemporary RISC architectures.: MIPS架构体现了当代所有的RISC架构的基本设计原则。

15. RISC chips use a rather small number of relatively simple, fixed-length instructions, always 32 bits long.: RISC芯片采用数量较少、较为简单的固定长度指令，总是32位长。

16. During the early 1990's, there were five different RISC architectures that were actively competing with one another.: 在90年代早期，有五种不同的RISC体系结构，竞争非常激烈。

17. It was originally based on System v, release 3, and it ran exclusively on their RISC - PA-RISC HP 9000 platform.: 它最初基于SystemVrelease3，只能在RISC- PA - RISC HP 9000平台上运行。

18. Also on the processor front RISC systems themselves saw a 32.7% increase in revenue and a 15.3% increase in units shipped.: 另外，在前端处理器RISC系统上，出现了32.7%的收入增长和15.3%的安装数量增长。

19. In fact, most modern CISC processors actually translate their instructions to an internalized RISC format for efficiency.: 实际上，现代CISC处理器将自己的指令转换成了内部使用的risc格式，以实现更高的效率。

20. But last month the company received an initial round of funding from Caixa capital Risc, a Spanish venture capital company.: 但上个月公司收到了首轮来自西班牙一家风险投资公司CaixaCapital Risc的基金。

21. Thirdly, RISC design can support all function of exchanging, storing, editing, searching, and modifying the business cards.: 采用简单指令集的设计，能在系统内完成全部的交换、存储，编辑、查询、修改名片等操作。

22. The Power architecture stands for Power Optimization with Enhanced Risc and is the processor used by IBM midrange servers today.: POWER体系结构表示带有增强的Risc功能的“功率优化”，并且是当今ibm中型服务器所使用的处理器。

23. This paper describes an approach to instruction system-based on behavioral functional level test of MB86901 SPARC RISC chip.: 本文提出了一种基于指令系统的MB86901SPARCRISC芯片的行为功能级测试方法。

24. Coversely, the highly programmable RISC-based solutions have almost unlimited flexibility, but they sacrifice so much speed.: 而高可编程性RISC基解决方案具有很大灵活性，但它牺牲了太多的速度。

25. Aim at the problem, ARM (Advanced RISC Machines) CMOS chip was adopted for remote control of automobile electron door locks.: 针对这一问题，本文描述的汽车电子控制门锁的遥控仪器采用ARM(先进的精简指令微处理器)芯片。

26. The first chip actually had several chips on one single motherboard, but was refined to one RISC chip with more than 1 million transistors.: 第一个芯片实际上在一个主板上有几个芯片，但是优化为一个包含超过一百万个晶体管的RISC 芯片。

27. However, due to the limitation of embedded chips, it is impossible to complete the whole process of software development on RISC chips.: 但由于嵌入式芯片性能的局限性，无法在RISC芯片上完成整个软件开发过程。

28. RISC avoided this problem by keeping every instruction at the same length, making it easier for instructions to be pipelined in parallel.: RISC通过保证每一个指令的长度相等的方法避免了这个问题，使指令在并行结构中更容易被流水线操作。

29. RISC avoided this problem by keeping every instruction at the same length, making it easier for instructions to be pipelined in parallel.: RISC通过保证每一个指令的长度相等的方法避免了这个问题，使指令在并行结构中更容易被流水线操作。

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